The present invention relates to a nonvolatile, integrated-circuit memory array such as an electrically erasable, programmable read-only-memory (EEPROM) array or an electrically programmable read-only-memory (EPROM). In particular, the invention relates to a method and circuitry for programming floating-gate memory cells of an array of such cells, the array supplied by a single, low-voltage source of energy.
EEPROMs using hot-carrier-injection programming, as opposed to Fowler-Nordheim tunneling programming, are described in: (a) "A Single Transistor EEPROM cell and its implementation in a 512K CMOS EEPROM", S. Mukherjee et al., IEDM 1985 (p. 616-619) and in (b) "A 90 ns 100K Erase/Program Cycle Megabit Flash Memory", V. Kynett et al., ISSCC 1989 (p. 140-141). The topic of reference (a) is also discussed in U.S. Pat. No. 4,698,787.
During typical prior-art, hot-carrier-injection programming of a selected cell, the voltages applied to the source, drain and control gate of that cell are: (1) a reference voltage equal to the substrate voltage (VSS, which may be 0 V) applied to the source; (2) a first positive voltage VBL, perhaps +5 V to +7 V with respect to reference voltage, applied to the drain; (3) a second positive voltage VPP, perhaps +12 V with respect to reference voltage, applied to the control gate.
Under those conditions, the channel between the drain and source is highly conductive. Electrons reaching the substrate-drain PN junction are subjected to two electric fields, one associated with the reverse-biased substrate-drain PN junction and the other associated with the positive voltage coupled from the control gate to the floating gate. The two electric fields cause electrons (hot carriers) to be injected into the floating gate.
The electric field generated in the silicon substrate near the substrate-drain PN junction and floating-gate interface is the primary factor in determining programmability by hot-carrier injection in floating-gate memories, such as EPROM and Flash EPROM arrays. That electric field is primarily a function of the drain-to-source potential, but also includes other parameters such as the doping profiles of the channel region and the drain region.
One type of floating-gate memory array requires both a five-volt supply and a twelve-volt supply. In such dual-supply memories, the twelve-volt supply is used to furnish the +5 V to +7 V drain voltage VBL needed during programming. Another type of floating-gate memory array requires a single five-volt-supply. In that single-supply memory, the five-volt supply is pumped by a charge-pump circuit to furnish a drain voltage VBL that is more than +6 V during programming. The +6 V charge-pump-circuit output is merely a 20% increase over the +5 V input, well within capability of charge-pump technology.
Because of the supply voltages available from inexpensive chemical batteries, portable electronic devices such as games and computers are preferably designed to operate with a single three-volt battery supply. Supplying a +6 V drain-to-source potential from that three-volt battery supply requires a charge-pump-circuit output that is 100% of the input voltage, rather than the mere 20% of the prior-art example above.
The sizes of circuit elements and the circuit complexity of charge-pump circuits increase dramatically with percentage increase in output voltage over input voltage. Although the programming current requirement remains roughly the same, the capability of the charge-pump circuit to furnish that current falls off rapidly with an increase in ratio of output voltage to input voltage, absent an increase in number of components and a large increase the size of certain of those components.
Specifically, the level of current that a charge-pump circuit can deliver is a function of the output voltage, the size of the capacitors and the frequency of the oscillator used in that charge-pump circuit. As the output voltage demand becomes higher, a given charge-pump circuit is able to deliver less and less current. For example, a single-stage charge-pump circuit is generally capable of delivering an output voltage that approaches twice the supply voltage. But as the voltage approaches twice the supply voltage, the capability of the charge-pump circuit to furnish current becomes very small, even with a very large increase in capacitance. Multiple-stage charge-pump circuits can deliver voltages greater than twice the supply voltage with the same increased circuit-complexity and low-current-output problems.
Additional voltage output from the charge-pump circuit is also required because of the voltage drops incurred in decoding circuitry and bussing.
Hot-carrier-injection programming requires that the charge-pump circuit furnish larger currents than those required using Fowler-Nordheim programming. However, hot-carrier-injection programming is performed with lower .electrical fields than those used in Fowler-Nordheim programming. In addition, hot-carrier-injection programming allows programming on a byte-basis.
There is a need for an efficient hot-carrier-injection-programming method and circuitry for use in a floating-gate memory array supplied by a single low-voltage power supply.